QDNix
Quick’n’dirty *NIX
ccu.c
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#include "arch.h"
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/* Clock control unit */
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#define CCU_BASE_ADDR 0x01C20000
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#define PPL_PERIPH0_CTRL_REG 0x0028
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void
ccu_init_clock(
void
)
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{
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mmio_write32(CCU_BASE_ADDR + PPL_PERIPH0_CTRL_REG, 0x90041811);
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while
(!(mmio_read32(CCU_BASE_ADDR + PPL_PERIPH0_CTRL_REG) & (1 << 28)));
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}
sys
arm
soc
cortex-a7
ccu.c
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